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 PD - 91247D
IRF7406
HEXFET(R) Power MOSFET
Generation V Technology Ultra Low On-Resistance l P-Channel Mosfet l Surface Mount l Available in Tape & Reel l Dynamic dv/dt Rating l Fast Switching Description
l l
S
1 8 7
A D D D D
S
S G
2
VDSS = -30V RDS(on) = 0.045
3
6
4
5
Top View
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. The SO-8 has been modified through a customized leadframe for enhanced thermal characteristics and multiple-die capability making it ideal in a variety of power applications. With these improvements, multiple devices can be used in an application with dramatically reduced board space. The package is designed for vapor phase, infra red, or wave soldering techniques. Power dissipation of greater than 0.8W is possible in a typical PCB mount application.
SO-8
Absolute Maximum Ratings
Parameter
ID @ TA = 25C ID @ TA = 25C ID @ TA = 70C IDM PD @TA = 25C V GS dv/dt TJ, TSTG 10 Sec. Pulsed Drain Current, VGS @ -10V Continuous Drain Current, VGS @ -10V Continuous Drain Current, VGS @ -10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Junction and Storage Temperature Range
Max.
-6.7 -5.8 -3.7 -23 2.5 0.02 20 -5.0 -55 to + 150
Units
A W W/C V V/ns C
Thermal Resistance Ratings
Parameter
RJA Maximum Junction-to-Ambient
Typ.
Max.
50
Units
C/W
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1
06/12/03
IRF7406
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient V(BR)DSS RDS(ON) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. Typ. Max. Units Conditions -30 V VGS = 0V, ID = -250A -0.020 V/C Reference to 25C, ID = -1mA 0.045 VGS = -10V, I D = -2.8A 0.070 VGS = -4.5V, ID = -2.4A -1.0 V VDS = VGS, ID = -250A 3.1 S VDS = -15V, ID = -2.8A -1.0 VDS = -24V, VGS = 0V A -25 VDS = -24V, VGS = 0V, TJ = 125C -100 VGS = -20V nA 100 VGS = 20V 59 ID = -2.8A 5.7 nC VDS = -2.4V 21 VGS = -10V, See Fig. 6 and 12 16 VDD = -15V 33 ID = -2.8A ns 45 RG = 6.0 47 RD = 5.3, See Fig. 10 2.5 4.0 nH pF 1100 490 220
D
Between lead tip and center of die contact VGS = 0V VDS = -25V = 1.0MHz, See Fig. 5
G
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr ton
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units 42 64 -3.1 A -23 -1.0 63 96 V ns nC
Conditions D MOSFET symbol showing the G integral reverse p-n junction diode. S TJ = 25C, IS = -2.0A, VGS = 0V TJ = 25C, IF = -2.8A di/dt = 100A/s
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width 300s; duty cycle 2%.
ISD -2.8A, di/dt 90A/s, VDD V(BR)DSS,
TJ 150C
Surface mounted on FR-4 board, t 10sec.
2
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IRF7406
1000
VGS - 15V - 10V - 8.0V - 7.0V - 6.0V - 5.5V - 5.0V BOTTOM - 4.5V TOP
1000
-ID , Drain-to-Source Current (A)
100
-I D , Drain-to-Source Current (A)
VGS - 15V - 10V - 8.0V - 7.0V - 6.0V - 5.5V - 5.0V BOTTOM - 4.5V TOP
100
-4.5V
10
-4.5V
10
1 0.1 1
20s PULSE WIDTH TJ = 25C A
10 100
1 0.1
20s PULSE WIDTH TJ = 150C
1 10
A
100
-VDS , Drain-to-Source Voltage (V)
-VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.0
R DS(on) , Drain-to-Source On Resistance (Normalized)
I D = -4.7A
-ID , Drain-to-Source Current (A)
1.5
T = 25C J
100
1.0
TJ = 150C
0.5
10 4 5 6 7
VDS = -15V 20s PULSE WIDTH
8 9 10
A
0.0 -60 -40 -20 0 20 40 60 80
VGS = -10V
A
100 120 140 160
-VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature (C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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3
IRF7406
2500
2000
-VGS , Gate-to-Source Voltage (V)
V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd C oss = Cds + C gd
20
I D = -2.8A VDS = -24V
16
C, Capacitance (pF)
1500
Ciss Coss
12
1000
8
500
Crss
4
0 1 10 100
A
0 0 20
FOR TEST CIRCUIT SEE FIGURE 12
40 60
A
-VDS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
100
-ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
-ID , Drain Current (A) I
10
100us
TJ = 150C
TJ = 25C
10 1ms
1
0.1 0.3 0.6 0.9
VGS = 0V
A
1.2
1 0.1
TA = 25 C TJ = 150 C Single Pulse
1 10
10ms
100
-VSD , Source-to-Drain Voltage (V)
-VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRF7406
6.0
V DS
5.0
RD
V GS RG
D.U.T.
+
-ID , Drain Current (A)
4.0
3.0
-10V
Pulse Width 1 s Duty Factor 0.1 %
2.0
Fig 10a. Switching Time Test Circuit
VDS 90%
1.0
0.0 25 50 75 100 125 150
TC , Case Temperature ( C)
Fig 9. Maximum Drain Current Vs. Ambient Temperature
10% VGS
td(on) tr t d(off) tf
Fig 10b. Switching Time Waveforms
100
Thermal Response (Z thJA )
D = 0.50 0.20 0.10 0.05 0.02 1 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJA + TA 0.01 0.1 1 10 100
10
0.1 0.0001
0.001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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-
V DD
5
IRF7406
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
QGS VG
QGD
VGS
-3mA
IG
ID
Charge
Current Sampling Resistors
Fig 12a. Basic Gate Charge Waveform
Fig 12b. Gate Charge Test Circuit
6
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+
-10V
D.U.T.
-
VDS
IRF7406
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG VGS*
**
* dv/dt controlled by RG * ISD controlled by Duty Factor "D" * D.U.T. - Device Under Test
+ -
V DD
*
*
Reverse Polarity for P-Channel ** Use P-Channel Driver for P-Channel Measurements
Driver Gate Drive P.W. Period D= P.W. Period
[VGS=10V ] ***
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
[VDD]
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
[ ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 13. For P-Channel HEXFETS
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7
IRF7406
Package Outline
SO-8 Outline Dimensions are shown in millimeters (inches)
D -B-
DIM
5
INCHES MIN .0532 .0040 .014 .0075 .189 .150 MAX .0688 .0098 .018 .0098 .196 .157
MILLIMETERS MIN 1.35 0.10 0.36 0.19 4.80 3.81 MAX 1.75 0.25 0.46 0.25 4.98 3.99
A
6 5 H 0.25 (.010) M AM
5
8 E -A-
7
A1 B C D E
1
2
3
4
e 6X
K x 45 e1 A
e e1 H K L
.050 BASIC .025 BASIC .2284 .011 0.16 0 .2440 .019 .050 8
1.27 BASIC 0.635 BASIC 5.80 0.28 0.41 0 6.20 0.48 1.27 8
0.10 (.004) L 8X 6 C 8X
-CB 8X 0.25 (.010) NOTES: A1 M CASBS
RECOMMENDED FOOTPRINT 0.72 (.028 ) 8X
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M-1982. 2. CONTROLLING DIMENSION : INCH. 3. DIMENSIONS ARE SHOWN IN MILLIMETERS (INCHES). 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA. 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS MOLD PROTRUSIONS NOT TO EXCEED 0.25 (.006). 6 DIMENSIONS IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE.. 1.27 ( .050 ) 3X 6.46 ( .255 )
1.78 (.070) 8X
Part Marking Information
SO-8
EXAMPLE: T HIS IS AN IRF7101 (MOS FET) DAT E CODE (YWW) Y = LAST DIGIT OF T HE YEAR WW = WEEK LOT CODE PART NUMBER
INT ERNAT IONAL RECTIFIER LOGO
YWW XXXX F7101
8
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IRF7406
Tape & Reel Information
SO-8 Dimensions are shown in millimeters (inches)
1.85 (.072) 4.10 (.161) 1.65 (.065) 3.90 (.154) 1.60 (.062) 1.50 (.059) 0.35 (.013) 0.25 (.010)
TERMINATION NUMBER 1
2.05 (.080) 1.95 (.077)
1
5.55 (.218) 5.45 (.215)
5.30 (.208) 5.10 (.201)
12.30 (.484) 11.70 (.461)
FEED DIRECTION
8.10 (.318) 7.90 (.311) 6.50 (.255) 6.30 (.248)
2.60 (.102) 1.50 (.059) 2.20 (.086) 2.00 (.079)
13.20 (.519) 12.80 (.504)
15.40 (.607) 11.90 (.469) 2
330.00 (13.000) MAX.
50.00 (1.969) MIN.
NOTES: 1 CONFORMS TO EIA-481-1 2 INCLUDES FLANGE DISTORTION @ OUTER EDGE 3 DIMENSIONS MEASURED @ HUB 4 CONTROLLING DIMENSION : METRIC
18.40 (.724) MAX 3 14.40 (.566) 12.40 (.448) 3
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 06/03
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9


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